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 CY7C1020CV26
512Kb (32K x 16) Static RAM
Features
* Temperature Range -- Automotive: -40C to 125C * High speed -- tAA = 15 ns * Optimized voltage range: 2.5V-2.7V * Automatic power-down when deselected * Independent control of upper and lower bits * CMOS for optimum speed/power * Package offered: 44-pin TSOP II Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A14). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A14). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the back of this data sheet for a complete description of read and write modes. The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1020CV26 is available in standard 44-pin TSOP Type II.
Functional Description
The CY7C1020CV26 is a high-performance CMOS static RAM organized as 32,768 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected.
Logic Block Diagram
DATA IN DRIVERS
Pin Configuration
TSOP II Top View NC A3 A2 A1 A0 CE I/O1 I/O2 I/O3 I/O4 VCC VSS I/O5 I/O6 I/O7 I/O8 WE A4 A14 A13 A12 NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A7 A6 A5 A4 A3 A2 A1 A0
32K x 16 RAM Array
I/O1-I/O8 I/O9-I/O16
COLUMN DECODER BHE WE CE OE BLE
A5 A6 A7 OE BHE BLE I/O16 I/O15 I/O14 I/O13 VSS VCC I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 NC
ROW DECODER
Selection Guide
CY7C1020CV26-15 Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current 15 100 5 Unit ns mA mA
Cypress Semiconductor Corporation Document #: 38-05406 Rev. *A
A8 A9 A10 A11 A12 A13 A14
*
SENSE AMPS
3901 North First Street
*
San Jose, CA 95134 * 408-943-2600 Revised April 18, 2005
CY7C1020CV26
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. -65C to +150C Ambient Temperature with Power Applied............................................. -55C to +125C Supply Voltage on VCC to Relative GND[1] .... -0.5V to +4.6V DC Voltage Applied to Outputs in High-Z State[1] ......................................-0.5V to VCC+0.5V Range Automotive DC Input Voltage[1] .................................. -0.5V to VCC+0.5V Current into Outputs (LOW)......................................... 20 mA Static Discharge Voltage........................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current..................................................... > 200 mA
Operating Range
Ambient Temperature -40C to +125C VCC 2.5V to 2.7V
Electrical Characteristics Over the Operating Range
CY7C1020CV26 Parameter VOH VOL VIH VIL IIX IOZ IOS[2] ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage[1] Input Load Current Output Leakage Current Output Short Circuit Current VCC Operating Supply Current Automatic CE Power-Down Current --TTL Inputs Automatic CE Power-down Current --CMOS Inputs GND < VI < VCC GND < VI < VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC Max. VCC, CE > VIH VIN > VIH or VIN < VIL, f = fMAX Max. VCC, CE > VCC - 0.3V, VIN > VCC - 0.3V, or VIN < 0.3V, f = 0 Test Conditions VCC = Min., IOH = -1.0 mA VCC = Min., IOL = 1.0 mA 2.0 -0.3 -5 -5 Min. 2.3 0.4 VCC + 0.3 0.8 +5 +5 -300 100 40 5 Max. Unit V V V V A A mA mA mA mA
Capacitance[3]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 2.6V Max. 8 8 Unit pF pF
Notes: 1. VIL (min.) = -2.0V for pulse durations of less than 20 ns. 2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. 3. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05406 Rev. *A
Page 2 of 8
CY7C1020CV26
AC Test Loads and Waveforms[4]
R 1830 2.6V OUTPUT 30 pF
(a)
ALL INPUT PULSES 2.5V 90% R2 1976 GND 10% 90% 10%
Rise Time: 1 V/ns (b)
Fall Time:1 V/ns
AC Switching Characteristics Over the Operating Range
CY7C1020CV26 Parameter READ CYCLE tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU[7] tPD[7] tDBE tLZBE tHZBE WRITE tWC tSCE tAW tHA tSA tPWE tSD tHD tLZWE tHZWE tBW CYCLE[8] Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE HIGH to Low WE LOW to High Z[5] Z[5, 6] 10 15 10 10 0 0 10 8 0 3 4 ns ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low Z[5] OE HIGH to High CE LOW to Low CE HIGH to High Z[5, 6] 3 7 0 15 7 0 7 Z[5, 6] Z[5] 0 7 3 15 7 15 15 ns ns ns ns ns ns ns ns ns ns ns ns ns ns Description Min. Max. Unit
CE LOW to Power-up CE HIGH to Power-down Byte Enable to Data Valid Byte Enable to Low Z Byte Disable to High Z
Byte Enable to End of Write
Notes: 4. Test conditions assume signal transition time of 1V/ns or less, timing reference levels of 1.3V, input pulse levels of 0 to 2.5V and transmission line loads as in (a) of AC Test Loads. 5. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 6. tHZOE, tHZBE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage. 7. This parameter is guaranteed by design and is not tested. 8. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE / BLE LOW. CE, WE and BHE / BLE must be LOW to initiate a write, and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
Document #: 38-05406 Rev. *A
Page 3 of 8
CY7C1020CV26
Switching Waveforms
Read Cycle No. 1[9, 10]
tRC ADDRESS tAA tOHA DATA OUT PREVIOUS DATA VALID DATA VALID
Read Cycle No. 2 (OE Controlled)[10, 11]
ADDRESS tRC CE tACE OE BHE, BLE tDOE tLZOE tDBE tLZBE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% tHZCE tHZBE DATA VALID tPD 50% IISB SB IICC CC tHZOE
HIGH IMPEDANCE
DATA OUT
Notes: 9. Device is continuously selected. OE, CE, BHE and/or BHE = VIL. 10. WE is HIGH for read cycle. 11. Address valid prior to or coincident with CE transition LOW.
Document #: 38-05406 Rev. *A
Page 4 of 8
CY7C1020CV26
Switching Waveforms
Write Cycle No. 1 (CE Controlled)[12, 13]
tWC ADDRESS
CE
tSA
tSCE
tAW tPWE WE tBW BHE, BLE tSD DATA I/O tHD
tHA
Write Cycle No. 2 (BLE or BHE Controlled)
tWC ADDRESS
BHE, BLE
tSA
tBW
tAW tPWE WE tSCE CE tSD DATA I/O tHD
tHA
Notes: 12. Data I/O is high impedance if OE or BHE and BLE = VIH. 13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Document #: 38-05406 Rev. *A
Page 5 of 8
CY7C1020CV26
Switching Waveforms
Write Cycle No. 3 (WE Controlled, OE LOW)
tWC ADDRESS
CE
tSCE
tAW tSA tPWE
tHA
WE tBW BHE, BLE tHZWE DATA I/O tLZWE tSD tHD
Truth Table
CE H L OE X L WE X H BLE X L L H L X L L L H L L H X H X X H BHE X L H L L H L X H I/O1-I/O8 High Z Data Out Data Out High Z Data In Data In High Z High Z High Z I/O9-I/O16 High Z Data Out High Z Data Out Data In High Z Data In High Z High Z Power-down Read - All bits Read - Lower bits only Read - Upper bits only Write - All bits Write - Lower bits only Write - Upper bits only Selected, Outputs Disabled Selected, Outputs Disabled Mode Power Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC)
Ordering Information
Speed (ns) 15 Ordering Code CY7C1020CV26-15ZSXE Package Name Z44 Package Type 44-Lead TSOP Type II (Pb-Free) Operating Range Automotive
Document #: 38-05406 Rev. *A
Page 6 of 8
CY7C1020CV26
Package Diagrams
44-Pin TSOP II Z44
51-85087-*A
All product and company names mentioned in this document are the trademarks of their respective holders.
Document #: 38-05406 Rev. *A
Page 7 of 8
(c) Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
CY7C1020CV26
Document History Page
Document Title: CY7C1020CV26 512Kb (32K x 16) Static RAM Document Number: 38-05406 REV. ** *A ECN NO. 128060 352999 Issue Date 07/30/03 See ECN Orig. of Change EJH SYT Description of Change Customized data sheet to meet special requirements for CG5988AF Automotive temperature range: -40C / +125C Removed `CG5988AF' from the Datasheet Edited the features section for better structure on Page 1 Edited the title to include the mention of `512Kb'
Document #: 38-05406 Rev. *A
Page 8 of 8


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